Considerations for Improving 3D NAND Performance, Reliability, and Yield

White Paper

NAND flash technology has provided the world with nonvolatile memory capability for many years. Its uses have grown from flash drives to applications in laptops, smartphones, tablets, and solid-state devices now used in cloud storage operations. Over time, its structures have changed to meet growing needs for storage capacity, scale, and reliability demands, but the technology has proven its worth by delivering increased performance and lower power consumption with the promise of a lower cost per bit than previous solid-state memory technologies.

Initially, increased memory density and the corresponding cost reduction resulted from NAND flash memory manufacturers use of multiple patterning techniques to achieve progressively smaller dimensions. Unfortunately, 2D/planar NAND flash memory reached its scaling limit at the 15 nm node. This forced manufacturers to adopt a revolutionary approach of stacking gate-all-around NAND cell layers to achieve new performance targets. This was the dawn of today’s 3D NAND structures, which represent a fundamental shift in the approach to scaling. Instead of scaling horizontally on a two-dimensional plane, this technology introduced vertical scaling, or growth in a third dimension. The promise of 3D NAND is higher density and a lower cost per bit.