EUV Enablement: Solving Defect Challenges in the EUV Process
Thursday, March 25, 12 – 12:45 PM EST / 9 – 9:45 AM PST
with live Q&A
As data volume continues to explode, microprocessors and memory storage circuits must continue to get denser and faster. At some point, incremental improvements are no longer sufficient and further device shrinking requires a completely different technology.
The semiconductor industry is experiencing this with lithography, where extreme ultraviolet (EUV) lithography is replacing multiple level patterning for more and more critical chip layers in the sub-7 nm nodes.
In this webinar, we will discuss:
- The latest technology developments related to EUV implementation
- How to reduce defectivity and variability challenges in the EUV process
Following the presentation, you will have the opportunity to participate in a live Q&A session with our technology experts.
About the Presenter:
Dr. Yang joined Entegris in 2012 to serve as the vice president of market strategy. In his role,
he is responsible for product and market strategy, market research and market trend analysis, strategic marketing, and the company’s strategic technology roadmap.
Prior to joining Entegris, Dr. Yang was an equity research analyst at Citigroup covering the semiconductor equipment and materials sector. He also served in various executive roles at Advanced Micro Devices, Tokyo Electron, and two start-up companies.
Dr. Yang received a Ph.D. in materials science and engineering and an MBA from Rensselaer Polytechnic Institute.